| ??? 03/28/03 10:41 Read: times |
#42427 - RE: Power Down & Reset in a 8051 erase RAM Responding to: ???'s previous message |
If you are using Keil include a copy of startup.a51 in your project and modify it to prevent memory from being cleared. Other compilers may have a similar facilty?
Note that a port latch is in fact a special function register and will therefore be set to 0xff (by the microcontroller) on reset. |
| Topic | Author | Date |
| Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 | |
Thanks a lot!! I got it | 01/01/70 00:00 | |
| RE: Power Down & Reset in a 8051 erase RAM | 01/01/70 00:00 |



