| ??? 04/15/03 13:24 Read: times |
#43444 - RE: if I tell SUART nobody understands me Responding to: ???'s previous message |
"65 is rather close to the 68 that the minimum configuration from the Triscend suggests."
Presumably the Triscend does some thing that the Xilinx app note doesn't? eg, 9-bit mode? mode framing options? includes BRG? Actually, I believe that the Triscend CSL is based on Xilinx technology. Shouldn't be hard to implement the Xilinx App Note on a Triscend (or even a PSD?) - avoiding the need for 2 chips, clocking issues, etc, etc. |
| Topic | Author | Date |
| simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| if I tell SUART nobody understands me | 01/01/70 00:00 | |
| RE: if I tell SUART nobody understands me | 01/01/70 00:00 | |
| RE: if I tell SUART nobody understands me | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
| RE: simple UART in CPLD | 01/01/70 00:00 | |
RE: simple UART in CPLD | 01/01/70 00:00 |