Hallo Lance,

Port circuitry with it's complex structure of severeal active pull-ups does only allow ONE logical level, that can always be applied to a Port pin, without that any damage is to be expected. And this logical level is '0'. Only exception: Port 2 is used for addressing external memory.
So, '0' should be the active state. '1', therefore, should be the default state. This is meant by 'negative logic'.

Other question:
Using 8bit you can encode 256 different states. So, when identifying some certain pattern, 256 cases have to be distinguished.

Bye,
Kai