Hallo Paul,

I didn't mean anything special.
Think about !RD signal, for instance. Port output drivers feeding this line aren't as strong as other bus output drivers for some 8051-derivatives, means, high level is not produced by strong pull-up being permanently switched-on. Only for the making of 0-to-1-transitions, strong pull-ups are activated for some clock periods. Rest of time much weaker pull-up is turned-on for keeping !RD at high level. At this time, output impedance of port output driver is significantly increased, and also susceptibility to noise coupling.
If you extend your mcu circuitry over a large board area, it might be advantagously to buffer !RD signal next to mcu. Then !RD' signal, a buffered copy of !RD, shows much lower output impedance and noise coupling into this line via stray capacitnace is highly suppressed.
But there's also a disadvantage when buffering such signals, like !RD or others. Due to additional propagation delay time correlation between bus signals can erode. In our example, tRHDZ (data float after !RD) can make trouble. In a system running at 24MHz, tRHDZ must be shorter than 55nsec, e.g., means, accessed memory must have floated data bus in less than 55nsec after remove of !RD, otherwise bus contention may happen. If you now have lots of propagation delay time at !RD' signal, then margin becomes smaller and smaller.

This is all I wanted to focuse: Every inserted buffer, whether for address, data or control signals can erode correlation of bus timing and this effect must be taken into account.

Good luck,
Kai