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???
07/11/03 15:45
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#50496 - RE: BUS conversion
Responding to: ???'s previous message
The whole point about FPGAs and CPLDs being 5 volt tollerant is that they will work with acceptable noise margins with both 5 volt and 3.3 volt logic families,the trick is that the logic core and the output drive are driven by seperate supplies and depending on how you configure them sets what you can do with them,also xilinx fpgas are five volt tollerant and they do not suffer from problems related to power sequencing which othe logic families do.

List of 8 messages in thread
TopicAuthorDate
BUS conversion            01/01/70 00:00      
   RE: BUS conversion            01/01/70 00:00      
      RE: BUS conversion            01/01/70 00:00      
         RE: BUS conversion, Michael            01/01/70 00:00      
         RE: BUS conversion            01/01/70 00:00      
   RE: BUS conversion            01/01/70 00:00      
      RE: BUS conversion            01/01/70 00:00      
         RE: BUS conversion            01/01/70 00:00      

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