If you followed my earlier suggestion to run the timer at 10 mSec (100 Hz) then the Timer 0 can be set to Mode 1 similar to the state machine tutorial in 16 bit timer mode. The timer clocks at Fosc/12. You said before that your Fosc = 11.0952 mHz. This means that the timer clocks at 924600 Hz. To derive a 100 Hz timer rate the timer divider has to be 924600/100 = 9246. On an 8051 since the timers count up to 0xFFFF the reload value is 65536 - 9246 = 56290 (which is the value that gets loaded as two bytes into the T0L and T0H registers.

If you look at the timer interrupt service routine code for a typical ISR you will see that there are a small number of machine cycles of instructions that happen to vector to the ISR and then process the initial part before the timer gets reloaded. This short period will actually cause the timer interrupt to run a bit slower than the 100 Hz rate you are shooting for. This can be compensated for by lowering the above suggested 9246 number. When you get the proper number installed here, and then have the RAM variable that further divides the timer interrupt rate down by the additonal factor of 100 to get to your 1 second rate the net rate will be 1 second as accurate as the original frequency of the Fosc crystal.

Michael Karas