Hello. I have a timer0 ISR that updates the state of some of the I/O pins and sometimes re-arms the timer and sometimes turns it off.

If the newly-filled timer overflows AGAIN before my ISR exits (some of these time steps are very small), the chip will re-enter the timer0 ISR as soon as it possibly can. I'm very happy about this.

Now, what if my the ISR sets TR0=0 and ET0=0 after the timer overflows but before the ISR exits? Will the ISR be re-entered almost immediately? I hope not -- that's why I set ET0=0. :)

I've searched through all the documentation that I have and can't find a definitive answer ot this question. Does anybody know?

Thanks,

- Scott