"Thus, the instruction sequence:

EA = 1; // enable global interrupts
PCON = 0x01; // set IDLE mode
... is atomic from the standpoint of interrupts. That is, it is not possible for an interrupt to be serviced between the EA write and the PCON write."

And why not ? Service the ISR and go into Idle mode - and wake up on the next interrupt. Why should this not be possible ?

Is it a hardware limitation or logical limitation ?

Maybe I am missing something altogether....

Raghu