It's not possible because that's the way the hardware is designed and funtions. Take a look through Da Book - the original Intel 8051 datasheet, and you'll see this.

It's not desireable as per my thread of like name a ways down on this forum: I've implemented an event driven architecture, and the linkage between interrupt and base level processing requires this atomicity, else I may process an interrupt at interrupt level, but the base level code would have no way to know about it and the machine would just go to sleep until the next interrupt (if any!); and thus the latency of events input to the base level code would be artificially inflated.

Indeed, if you want to use idle mode at all, this atomicity is virtually a necessity.

David