Ray:
The 8051 architecture separates the code space out from the data space. Thus as has been indicated by Steve it is possible to fill up the external address space with a full 64K of code memory (these days most likely FLASH) and 64K of data memory (SRAM in most cases).

It has been a common trick with 8051's to sometimes arrange the design of the external memory area so that the code part of the space is writable by overlapping the code space with the data space (or at least a portion of it). This allows the FLASH memory to be re-programmed in circuit. I would recommend that after you understand how the external memory mechanism of the the standard types of 8051s functions that you then look at integrating a small CPLD into the external memory interface so that you can devise some flexibility how the external mapping of the memory works and so that it can be dynamically changed at run time.

Of course you can avoid all this complication if you were to select a derivative type that had a full 64K of FLASH already built in. There are now a fair number of these parts and many even have some of the external RAM data type memory also built on chip. Of course with these you could still attach external SRAM to being the total available external RAM up to 64K bytes.

Michael Karas