??? 05/17/04 15:27 Read: times |
#70482 - another approach Responding to: ???'s previous message |
With the event of the <$1 LPC9xx chips I have changed quite a bit in my approach to "many I/O" designs.
As an example: In a current project I use a LPC932 to process the keyboard, the key is read to the "mother uC" via IIC. So what is this good for? 1) no pins used on the 'mother uC' used (IIC there anyhow). 2) the keyboard processor can debounce and all that without worrying about higher priority processes taking time away. 3) the 'mother uC' does not lose time from important events because of kbd action. 4) the LPC9xx can be located right at the keyboard connector and really cut down on PCB complexity. Another LPC9xx drives the VFD. This could easily be handled by the same as the keyboard, but since the VFD and the keyboard connectors are on different boards (sandwich, front connect to kbd, rear connect to VFD, so because of size) using a separate LPC for the display reduce the interconnect by 11 wires. Erik This is, indeed, the way to do multitasking. |