This is true only to a degree. There are possibly modes of the Timer 0 overflow wherein there may need to be an ISR to support it. In the cases where it is suitable to use TIMER0 overflow type clocking where Timer 0 free runs in full 16 bit mode, full 8 bit mode or in free running auto reload mode then no ISR would be required. However there are many possibilites wherein some other clocking rate may be required, particulary when Timer 0 is running in 16-bit mode, where an ISR could be needed to re-load the Timer 0 to a non-65536 counting modulus.

A side note:
I really prefer the PCA implementation on the SiLabs (Cygnal) parts. These have a much better support for a 16-bit PWM Mode that works along the lines of the third scheme I described above in my long winded discription of the PWM modes possible with a PCA. The Cygnal 16-bit PWM Mode is designed to set the output pin on the part at the match compare time (instead of a toggle like in HIGH SPEED mode). The output signals in this Cygnal mode are then cleared again all at once when the PCA counter overflows. And note that once again it is possible to setup to have a software interrupt on the PCA counter overflow which can then change the count in the PCA counter so that it does not have to run a full 16-bit count sequence.

Michael Karas