Raj Shetgar:

It is somewhat of a mystery to me why you want to configure the circuit as you have shown. I suspect that you did not really mean to show it as you did and so I took the liberty to change the graphic to show as below.

In this modified version the LCD power becomes enabled after the RESET time is complete. The RST pin on an AT89S52 is normally an input pin to the microcontroller that also has an internal pulldown resistor of value from 50K to 300K ohms. The reset IC should easily be able to deliver a high RESET signal to the microcontroller through the 4.7K ohm resistor I have shown.

Under the special conditions that the AT89S52 internal watchdog is enabled (i.e. software has written the values 01EH and 0E1H in sequence to the WDTRST register: SFR location 0A6H at least once) and the RESET HIGH feature is enabled (i.e. the DISRTO bit in the AUXR register is programmed to a "0") and then watch dog times out the RST pin will be driven HIGH as an output from the microcontroller. The pin is driven high for a period equal to 98 oscillator cycles. The Atmel data sheet does not specifically address how much current the RST pin can source during the 98 clock HIGH output time but if one presumes that it can source 1 mA then the output signal should be able to pull the line high even though the RESET Controller is staying low on the other side of the 4.7K ohm resistor.



If you find that the AT89S52 cannot source 1mA on the RESET HIGH condition then please scale all of the resistors I show above by a suitable factor.

I have my doubts that this scheme will actually be reliable enough to properly reset the LCD controller via a power cycle. At say 12 MHz, the output pulse will only be on the order of some 8 or 9 µs. I think a far better scheme would be to organize your LCD control more like in the following diagram. Here the LCD and its backlight controls are by default in the off state after power up or a RESET. This is due to the fact that the port pins of the microcontroller wake up in the input mode at a high level that is established by weak pullups on the chip. Software can delay a suitable time after it begins execution from the reset vector before it applies a low level to the port pin to power the LCD module. (In some applications where I have used this scheme I had a delay of somewhere from 35 to 50 milliseconds).



If you use the latter scheme you still should tie a 4.7K resistor between the Reset IC and the microcontroller if you intend to use the RESET HIGH feature after the watch dog times out. However it seems to me that you can just set the DISRTO bit in the AUXR register to a "1" which then keeps the AT89S52 RST pin as a strict input only pin. Then there is no need for the resistor between the Reset IC and the microcontroller.

Good Luck,
Michael Karas