Hello Raj,

Looking at your circuit, it is obvious that at any one time, only one of the chips/devices (sharing the data bus) will be enabled otherwise you will face bus contention.
So you need to calculate the worst case.If you look at the datasheets of the devices used, you should take care that fan-in of any chip does not exceed the fan-out of Port 0 when port 0 is emitting data. Vice versa, the chips should be able to drive the port 0 (i.e. fan-in of port 0 should be less than fan-out of the enabled chip). Fan-out & Fan-in are usually expressed as standard TTL loads. If my memory is good, 1 LS TTL load = 0.4 mA

DC characteristics usually refer to input/output voltage levels, source/sink currents , operating current, quiscent current and so on while AC characteristics refer to timings, frequency, rise/fall time, pulse widths etc.