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???
07/19/04 07:16
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Msg Score: +1
 +1 Informative
#74432 - RE: Connect PSEN and RD, keep PSEN high.
Responding to: ???'s previous message
hi,

First of all, next answers is just ones for your questions. I have to say that your questions are produced from wrong sources (bad reading of datasheets)so just read my answers and then READ TRUE NOTES below!
=== just answers based on wrong questions === ignore all ===
1) Instead of putting the AND gate between PSEN and RD, while connecting to external memory, if I simply connect the lines any of them going low should pull the line low, allowing common code/data memory. Right?

No. Although /RD is weak pull-upped at inactive state, nevertheless /PSEN has always strong output. As result, if they are tied together, then /PSEN and /RD will be overloaded when /PSEN is high and /RD is low (during MOVX to external data memory).

2) For serial programming purposes I need to keep PSEN low, EA and RST high. If I run a pull-up through a switch to EA and RST and the same line through a negator to PSEN, I get the result with one switch, but once disconnected/grounded it will go high for whole runtime duration. PSEN or OR should be still able to sink it keeping solution (1) working. Right?

No. If /PSEN is connected to an IC output (here: to high level output of an invertor) then both /PSEN and IC outputs will be overloaded during MOVC to external code memory. It is because both external IC and /PSEN have strong outputs. It is true as long as an IC has not open-drain output.
I suggest to use a button with two groups of contacts or open-drain inverter (74LS05).

3) If I apply (1) and (2), won't RD sink my negator output while I try to keep PSEN high? (I haven't seen in data sheet what happens to RD during serial programming or reset...) Would applying resistors somewhere underway help?

Generally, /RD is just a pin of P3. So as any other pin, it will be weak pull-upped during reset state.
As about "If you apply (1) and (2)" then like above, /RD will be overloaded at low level as same as /PSEN.

4) If I connect EA and RST like in (2), but want to pull EA up, it would pull RST up too. Would a diode allowing current from direction of RST to EA but not opposite, (and eventually a very weak pull-down on RST side) suffice to protect RST from going high?

Read what you want once again:
- you need EA to be high during serial programming (2), and
- you need EA to be high during rest of time (4).
Why do not just connect EA to VCC permanently then? (=
=== TRUE NOTES === READ CARYFULLY ===
First of all, read the device datasheet once again.
Then catch the revision of your chip and read next errata:
http://pdfserv.maxim-ic.com/errata/89C420A1.pdf
http://pdfserv.maxim-ic.com/errata/89C420A2.pdf

You will be very surprised with them. For example:

For serial programming purposes I need to keep PSEN low, EA and RST high

No, EA must be low. From the datasheet: ... the ROM loader mode can be invoked at any time by forcing RST = 1, EA = 0, and PSEN = 0.

About /PSEN strong output and an inverter output:
The signal PSEN is driven by a strong pullup internally, and the component used to pull it down to enter loader mode must be capable of sinking 100mA of current to ground.

About switches:

To enter loader mode, PSEN is sampled after reset is pulled high and EA is pulled low. This dictates that the transition of PSEN from high to low should be delayed from the onset of reset and EA by 8 clock cycles. This timing relationship will be eliminated in future revisions (i.e., signals can be set simultaneously).
Work Around:
Use individual manual switches, passive circuitry (RC combinations), or active counting circuits (driven off of one of the processor’s available clocks: ALE preferred) to delay the falling edge of PSEN so it will be sampled correctly (i.e., 8 oscillator clocks or more after reset and EA are set). This condition will be corrected on revision A2 coming shortly.


About additional conditions for boot-loader:
To enter loader mode, port pin P3.7 must be pulled high when the pin combination of RST = 1, PSEN = EA = 0 is applied. When exiting loader mode, port pin P3.7 must be pulled high before the pin combination of RST = 1, PSEN = EA = 0 is released.

And many, many other notes should be read by you before start to use it.

Finally, try to avoid any "extra tricks" when elaborate hardware. It helps you to avoid "extra problems" during usage of it.

Regards,
Oleg

List of 4 messages in thread
TopicAuthorDate
Connect PSEN and RD, keep PSEN high.            01/01/70 00:00      
   RE: Connect PSEN and RD, keep PSEN high.            01/01/70 00:00      
   RE: Connect PSEN and RD, keep PSEN high.            01/01/70 00:00      
   RE: Connect PSEN and RD, keep PSEN high.            01/01/70 00:00      

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