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???
07/19/04 11:14
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Msg Score: +2
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#74449 - RE: Port 0 of at89s51
Responding to: ???'s previous message
hi,

By the way, Atmel has documented bug:
if during execution program from internal flash, you write to external data memory with MOVX then P0 outputs:
- A0...A7 (for ALE latch), then
- D0...D7 (data to be wrote with /WR), and then
- content of PCL for one oscillator clock, even if program memory is still internal executed.
Only after it, P0 comes to its original state (disables strong pull up/down output).

Unfortunately, this "feature" is not indicated in some datasheets however it presents.

Regards,
Oleg

List of 14 messages in thread
TopicAuthorDate
Port 0 of at89s51            01/01/70 00:00      
   RE: Port 0 of at89s51            01/01/70 00:00      
      RE: Port 0 of at89s51            01/01/70 00:00      
         RE: Port 0 of at89s51            01/01/70 00:00      
            PULL UPs and PULL DOWNs            01/01/70 00:00      
            RE: Port 0 of at89s51            01/01/70 00:00      
               RE: Port 0 of at89s51            01/01/70 00:00      
                  RE: Port 0 of at89s51            01/01/70 00:00      
                     RE: Port 0 of at89s51            01/01/70 00:00      
                        RE: Port 0 of at89s51            01/01/70 00:00      
                           RE: Port 0 of at89s51            01/01/70 00:00      
                              Configuring Port0 as input.            01/01/70 00:00      
                                 RE: Configuring Port0 as input.            01/01/70 00:00      
   RE: Port 0 of at89s51            01/01/70 00:00      

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