Almost everything IS possible. Some things are not worth the effort though.
A non-retriggerable monostable multivibrator with a capacitor allowing for output slightly longer than the data word lasts, an AND gate, possibly a minimal transfer delay or even a low-pass capacitor to reduce the race condition between the data signal and the enable signal on the multivibrator output, and you have just removed the first bit from a cycle.
I don't know if I2C is positive logic or not but that would remove the first bit off any fixed word length serial protocol, given the right setting on the multivibrator. (set for positive logic, use the / instead of input on multivibrator and negated output for negative logic)

in--+--------------+ AND
    |              |
    |               =|)--- out
    |              |
    +--[  ]-[R]-+-+
       mv        |
                === C
                 |
                 V GND

I honestly doubt if it's worth the effort though.