I also face this type of problem is some of the project. Here are some related to that

(1)Mr. Carloas has not mentione how he is counting the pulses. If he is using a normal TTL/CMOS counter ICs then even very short glitches of the order of usec/nsec modifies the counter. These glitches are generally at the transition state (low to high , high to low) and generated due to high di/dt or dv/dt and associated line inductance.

(2) These pulses invariably present during transition phase if a they are from mechnical switches (reed relay , limit switches)

(3) Even in case of optical sensing , if speed of encoding wheel is very slow then also pulses at the time of transition change occur. This is because just before transition phase optical wheel (in bet light source & sensor) is in a threshhold poisition and its very very small movement/rotation causes of photosensor output to change. It is during in this position if there is some vibration in system (and wheel) , wheel may move forward/backward( vibrate)in that threshhold poistion and cause photosensor to generate multiple pulse. A very small amount of in system (which even cannot be noticed by feeling) cause multiple generation during tran and during low speed it is more promin as wheel stay for more time at that position.I experienced such type of problem with a optical encoder and then has to switch over two phase optical encoder where two encoder wheel are deployed and are displaced phy and produce phase shifted pulse(they are generally used for direction sensing along with displace sens).Using SET/RESST LOGIC simi to RS Flip-flop problem of multi pulse during trans could easily be solved.

In all above cases problem can be solved if software counting tech is used with debouncing. Selection Debouncing time & tech will depend upon source of pulses , min & max pulse time.