hi,

thanks, Erik.

In fact, F12x indicates exactly the same values. It say: add 4 clocks to calculate total instruction time. As about timings diagrams so they are the same as for F02x and do not show these extra clocks as well.

Hmm, reality is "some" different from that CIP-51 Instructions Set Summary table shows. The table indicates 3 clock cycles for MOVX but then they say that 5 clocks is the min. time.
By the way, may it be that these 3 cycles are required for internal XRAM memory access only? I think this is the reason, do you?

Regards,
Oleg