??? 10/01/04 13:19 Read: times |
#78509 - RE: Port 0 as memory mapped i/o Responding to: ???'s previous message |
hi,
{ 1 LCD_RD = 1; 2 LCD_CD = 0; //3 P0 = dados; 4 LCD_CE = 0; 5 LCD_WR = 0; 6 LCD_WR = 0; 7 LCD_WR = 1; 8 LCD_CE = 1; //9 P0 = 0xFF; }Looking on this code I see that steps 5 and 6 duplicate each other. Assume, it is not a mistake but for timing conditions. If so then we may calculate that /WR pulse should be at least 24 oscillator periods. Now, as we know, external data memory access may be done with MOVX instruction. With standard AT89C51 you use, /WR and /RD pulses of MOVX instruction take 6 clock cycles. Unfortunatelly their duration may not be increased with standard derivative. So I think it is not possible for you to work with LCD as memory mapped device. Regards, Oleg |
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