Battery backed up SRAM are thing of past with EEPROM & FLESH. They are (battery backup SRAM) are prone to data corruption during power ON/OFF.

Parallel EEPROM like AT28c256 is also prone to data corruption as though they are software write protection but consider the situation when this protection is disabled for writing some bytes(by appl code) and there is power on/off , brown out. During these conditions it is quite poosible that CE, WR ect signal state are undefined and may cause unsolicites writing on memory location.Moreover parallel interfacting increase circuit design/ PCB design burden.

Serial EEPROM are safer in this respect as there everything is done through serial command and it is veru diffi for brown out event to generate this command seqeneces.

When 51' micro with internal EEPROM (89s8252 ,RD2 ) then why to go for external EEPROM