??? 10/07/04 00:59 Read: times |
#78923 - RE: data Flash Responding to: ???'s previous message |
Battery backed up SRAM are thing of past with EEPROM & FLESH. Not at all! They are (battery backup SRAM) are prone to data corruption during power ON/OFF. No more than any other technology, if you include a proper POR-BOR-chip (power-on-reset and brown-out-reset). ..but consider the situation when this protection is disabled for writing some bytes(by appl code) and there is power on/off , brown out. During these conditions it is quite poosible that CE, WR ect signal state are undefined and may cause unsolicites writing on memory location. Why?? If you have a proper reset-chip, then micro is resetted at every brown-out event, resulting in a deactivated /WR line. Also, AT28C256 has an additional undervoltage detector for Vcc, which disables any further write routine, too. Finally, you must disable write protection for each new write command, by a 6-Bytes-sequence. When 51' micro with internal EEPROM (89s8252 ,RD2) then why to go for external EEPROM Because AT28C256 has some EEPROM bytes more than AT89S8252?? Kai |
Topic | Author | Date |
data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash Try 89s8252 | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: EEPROM and Brownouts | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash![]() | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 | |
RE: data Flash | 01/01/70 00:00 |