??? 11/06/04 15:49 Read: times Msg Score: -3 -1 Looks like homework -2 Off-Topic |
#80543 - Delay Branch Instruction Problem |
Hi there, new here.
This is probably not the right place to ask this, but I've searched the internet for a suitable forum but can't find one. If you guys know a better place please let me know. The question relates to the Delay Branch Intruction mainly used on older RISC processors (I don't even know for sure if the 8052 is a RISC? So forgive my ignorance). Basically I know what the DelayBranchInstruction is basically about. That is executes the instruction following the branch instruction for matter what, and that the compiler makes sure that the instruction following the branch would be executed no matter what the result of the branch was. But my question is how many instruction following the branch are executed? Say it was a 5 stage pipeline with IF/ID/OF/OE/OS, then it will be the 5th step before the branch is actually implemented, yes? So does that mean that the 4 instructions after the branch will be executed before the branch actually happens? Hope you know what I'm on about, if you want to to elaborate please let me know. And sorry for asking something possibly totally unrelated to the purpose of the forum, unstand if you delete the thread. Thanks. |
Topic | Author | Date |
Delay Branch Instruction Problem | 01/01/70 00:00 | |
RE: Delay Branch Instruction Problem | 01/01/70 00:00 | |
RE: Delay Branch Instruction Problem | 01/01/70 00:00 | |
Off-Topic | 01/01/70 00:00 | |
RE: Off-Topic![]() | 01/01/70 00:00 |