Thanks for the response.

The question itself is not related to any given architecture, it's a general question on the general delay branch that would have been used by most RISC if you know what I mean?

I found the ee forum and posted the question at length there (the main question is in the comment after the initial question) in the ASM section hoping someone there would know. Probably better supply a link than try and draw them pipeline tables out again.

http://www.experts-exchange.com/Programmi...95971.html

Thanks again.