Assume that we have only three interrupt sources: serial, timer0 and timer1. Also assume that we want the serial to have the highest priority then timer1 and then timer0. So we set PS, so up to now nothing can penetrate serial_isr. Now where and how exactly can we tell the uC that timer1 is of higher priority than timer0? If we set PT1, the pooling sequence may ruin serial_isr when timer1 interrupt launches, so PT1 should be 0. Same is true for PT0. The concept of disabling interrupts in timer0_isr is useless since it may cause us to miss some serial characters. What then? Maybe we should have the same isr for timer0 and timer1 in which we first determine the source of interrup(timer0 or timer1) and then do the appropriate job. But even this way while we are... I mean while '51 is in this isr, (consider triggerred by timer0) timer1 interrupts(which has the same priority) are blocked.