I'm much more software than hardware, but I would think all you would have to do is OR -PSEN with -RD (P3.7) which would together be connected to the -OE of the Static RAM chip. You'd then invert -PSEN and connect it to A16 of the Static RAM.

I would think, then, that when the MCU attempted to read data memory, it would strobe RD low but PSEN would remain high. So -OE on the SRAM would be enabled with the highest address (A16) being 0 (-PSEN high inverted=0); so you'd call that your data memory.

If the MCU attempted to cread code memory, it would strobe -PSEN low but RD would remain high. Since they'd be OR'd, the -OE of the SRAM would still be enabled. -PSEN inverted would set A16=1, so you'd be accessing the upper 64k of SRAM; you'd call that your code memory.

You wouldn't really have to invert -PSEN either before connecting it to A16; that'd just keep things conceptually cleaner.

I think that's all you need to do. Can any harware people verify this?

Craig Steiner