| ??? 02/06/01 06:18 Read: times |
#9009 - RE: Using a 128k SRAM for RAM and ROM |
Hi Matthew,
It should be possible. You need to involve the DS line of the processor (DS may be called something else, I don't have a datasheet at hand). DS could control A16. But the actual circuit will be a bit more complicated. You have to combine PSEN and RD with an AND gate to get OE. And how do you put at least a bootstrap code in the RAM so the processor has something to do when it comes out of reset? Things are even more complicated because the 8052 cannot write to program space. So you have to use some bankswitching system to map it into XDATA space to write to the code memory. You may also need a ROM with some kind of loader software in it. When the ROM is active you can map the program RAM in XDATA space so it can be written to. It's a bit complicated but it is not impossible to do. |
| Topic | Author | Date |
| Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
| RE: Using a 128k SRAM for RAM and ROM | 01/01/70 00:00 | |
memory map address decoding | 01/01/70 00:00 |



