??? 03/21/05 21:21 Read: times |
#90191 - I was thinking... |
I know but it does happen sometimes,
having played around with implementing various versions of 8052s in suitable FPGAs and coming to the conclusion that itsa thankless task at the best of times for all but things like very highly customised devices the idea might be a cool way of producing a emulator where you need visibilty of internal signals as your code runs and with most FPGAs having more than enought i/o pins it would be a simple matter of bringing anysignal you wanted out of the device.In fact it could be made so that you could select which signals you wanted to look at and then simply recompile the 8052. I think thats a very cunning plan but someones proly already done it.*sigh* |
Topic | Author | Date |
I was thinking... | 01/01/70 00:00 | |
it's called a bondout | 01/01/70 00:00 | |
SOC design center | 01/01/70 00:00 | |
This is true | 01/01/70 00:00 | |
like this one? | 01/01/70 00:00 | |
JTAG debugger is inadequate | 01/01/70 00:00 | |
jtag![]() | 01/01/70 00:00 |