The KS0108 data sheet describes this register function this way:

10. Display Start Line Register

The display start line register indicates of display data RAM to display top line of liquid crystal display. Bit data (DB<0:5>) of the display start line set instruction is latched in display start line register. Latched data is transferred to the Z address counter while FRM is high, presetting the Z address counter. It is used for scrolling of the liquid crystal display screen.

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This chip has the function to supply 64 bit wide display information from an internal RAM to be displayed on a particular row/column of an LCD display. (Row or column terminology will depend entirely on the way your display is oriented). The internal memory has 64 "pages" of this 64-bit wide data. The idea is that one "page" is used for each display row/column of a panel up to a 64x64 matrix of pixels. The companion KS0107 chip that is used with this chip that you are asking about is used to select which one of the rows/columns is active at a time while the KS0108 provides the display data for that row/column.

It is rather normal to want to put the data from the row/column zero location of the RAM in the part onto the first line of the display. However the manufacturer has provided the Page start register that you asked about in order to select an alternate start position within the display RAM from which to fetch the data for the first physical display row/column. From then on as the KS0107 companion part scans through its 64 rows/columns the "pages" of the display memory are accessed in order and displayed in the LCD matrix.

There are two situations where it is desireable to have the start display line begin a frame from another position in the display memory. One of these is if you want to scroll the display one line at a time. Under these conditions to scroll simply means changing the start page register by one count. The display screen image now rolls one row/column. What used to appear on the first line now shows on the last line (if you have a 64 line matrix on the display). Using this means to scroll the display permits a real time smooth scroll of the display to occur without having to reload the entire display memory with new data at every scroll event. You only need to reload the 64 pixels along the line that has wrapped around on the display.

The second situation where this register is used is in cases where this controller and the KS0107 are used with an LCD matrix that is smaller than 64x64 pixels. Lets say the matrix was 64 bits wide per line but that the number of lines was 56. Under these conditions the KS0107 device would have 8 of its 64 line select outputs unused. When an LCD design engineer decides how to pick which 8 to leave unused he may pick chip outputs 56 to 63 OR he may pick 0 to 7 to be the unused outputs. Now when you pickup and want to use this 56x64 display you may decide in arbirtary way which line is your TOP line. Based up this you may have to offset the page start register to take care of the skipped and unused pins of the KS0107 chip.

An addendum to this 2nd point that there are now graphics LDC controller chips that can handle larger displays even 128x128 and larger in one chip. These chips also have the ability to roll the position of start columm and row. This permits scrolling in either the horizontal or vertical direction OR it permits a larger capability chip to drive LCD matrixes that are smaller than the full row and complement of the part and still let you pick the start position of the display image in the RAM to the edge of the actual display.

Michael Karas