Steve,

The phase/increment technique is a simple and classic way to generate fixed and frequency agile oscillators. 24 bit Phase/Increment oscillators easily implement for audio frequencies on std. '51 microprocessors.

Most commonly, with every sample clock, an N-Bit "phase angle accumulator" adds (modulo) an N-Bit "increment" value with the result of this addition being stored back to the phase accumulator. The result is a ramp of increasing (or with negative increments decreasing) values which overflow (underflow) and restart the ramp.

Usually only the MSB's are used either directly driving a DAC for Sawtooth waveform generation or more typically as an index into a table waveform samples (i.e. sine) which are then fed to a DAC, so the remaining bit's represent a fractional increment which is where the ability to flexibly generate a wide range of frequencies result.

When the frequency increment is not divisible by two some jitter results that exceeds that attributable to the sample clock.

Frequency modulation is easily achieved by using two phase/inc oscillators where a osc modulates the "increment" of the other oscillator.

Here's an interesting ref:

analog devices - ask the engineer

regards,
p