??? 04/22/05 17:08 Read: times |
#92182 - good point Responding to: ???'s previous message |
hi,
José Félix Díaz Ivorra said:
The transistors are saturated? if not you loose the "resistor selector methode" because you insert the transistor resistance.
I understand your point. Indeed I pay attention on n-p drop-value and its resistance. I see the problem is in low-voltage. Let say, Vref is 2,4V. So half-point is about 1,2V when first button is pressed. Second button does decrease the value for 0,6V, third for 0.3V and fouth for 0,15V. But saturated voltage of an optocoupler is not stong defined! It may be 0,3V or 0,2V or any other (+- percents). Although this drop voltage value is not so important for the first button nevertheless it does third and fouth pressed buttons` results total non-sense. Either I should increase the gain of Vref OpAmp to produce high voltage for DAC (let say, 9...12V - no problem with OpAmp) or to use optocouplers with real-digital output. First way is hard because after DAC process I need to transform the result voltage to appropriate value - you see, F120 allows ADC input value not above 2.4V only where I have this max. level about 4.5V or above. My experience does not show me a way how to make OpAmp gain below 1 for OpAmp with single power where the gain must not be depended on chip Vcc (due middle ground). The second way is very expensive. Hmm, Kai, maybe do you have a solution with your high experience with analog schematic? Regards, Oleg |
Topic | Author | Date |
ADC as digital input | 01/01/70 00:00 | |
Saturation | 01/01/70 00:00 | |
good point | 01/01/70 00:00 | |
URL | 01/01/70 00:00 | |
all good, but | 01/01/70 00:00 | |
optocouplers | 01/01/70 00:00 | |
Re: ADC as digital input | 01/01/70 00:00 | |
go analog | 01/01/70 00:00 | |
schematic | 01/01/70 00:00 | |
It is possible to do but why..... | 01/01/70 00:00 | |
opto | 01/01/70 00:00 | |
Possible but troublesome... | 01/01/70 00:00 | |
very informative | 01/01/70 00:00 | |
overcomming opto difference![]() | 01/01/70 00:00 |