Dear Oleg,

using an ADC to interface digital inputs is possible, but troublesome! Problems mainly arise from nonideal behaviour of ADC, and of DAC, if digital lines are coded into an analogue voltage by the help of this DAC. Of course, unsane effects resulting from unlinearity of converters could be rejected by the help of tables, but there are still relevant errors resulting from drift, offset, etc., especially if the DAC is built by using a 'do-it-yourself' R2R ladder converter, errors, which can't easily rejected by a simple table. Consequences of an unproperly designed circuit can be the developing of 'missing codes', where one or more digital inputs seem to disappear, means, even if their states change there's no effect in the ADC reading...

The use of an ADC to interface digital inputs should only be taken into consideration, if any other solution isn't practicable. So, it's not the purpose of this post to recommend their use, but only to demonstrate some unsane effects and how they can be overcome.

ADCs can show rather drastical deviations from ideal curve. Many 10bit ADCs built-in in todays microcontrollers can show deviations from ideal curve of several LSBs (least significant bit. So, there's absolutely no hope to be able to identify 10 keys by the help of such a 10bit ADC. If the ADC shows a maximum error of 2LSB, then in the very best case just 8 keys can be detected. But even this will not work, if one takes into consideration, that also the DAC will present some errors. And then there's finally noise, drift, etc. which will never allow to actually identify 8 keys.

So, if we cannot have 8 keys detected, what if we decrease the number of keys? What if we only take 6 keys? If we choose a rather precise DAC, then 6 keys should work, shouldn't it? But there's the next trap: Even if we decrease the number of keys and if we only use the highest bits of ADC we will nevertheless run into danger to end with missing codes! This we can see from the following picture, which shows the situation by the help of a very simple example, namely the use of an 4bit ADC:



Assuming that this 4bit ADC is ideal (black stair curve), we try to detect only 2 keys, by the help of a R2R DAC. Unfortunately our R2R DAC isn't error free and therefore we do not hit the exact values. This shows the red curve. From this curve we see, that even very slight errors of our R2R DAC is enough to produce missing codes: Only 1/2LSB error is needed to fail achieving '0100' (more precisely '01' because we only use the two highest bits in order to detect 2 keys). Yes, even if we only want to detect one single key, even only 1/2LSB will make us fail and result in a missing code...

Green curve shows us how to find a remedy for this problem: If we choose a suited offset, then our scheme will tolerate much higher errors of R2R DAC! We should choose the offset in such a way, that we will reach with our R2R DAC the center of the region of codes, which all show the same leading bits. In our example then 3/2LSB error of R2R DAC is needed to produce missing codes, instead of only 1/2LSB when not using this offset.

How to accomplish this offset? From the picture we can see, that just adding this offset to the reading of ADC will do the job. In our example we have to add '0010' to each reading. Another way (not so good, because of resulting in slightly higher errors) is to add this offset at the R2R DAC itself:



In this example the detection of 6 keys is shown, assuming, that AVcc is the analog supply voltage of micro, being connected to DVcc and being the reference voltage of ADC. Please note, that the whole R2R DAC, including the switches, is connected to the analog side of micro. 'AG' means 'analog ground'.

Some additional hints refering to the R2R DAC:

1. The 22k and 11k resistors must be as precise as possible. At least 1% tolerance types (or better) must be choosen!

2. The source impedance of driving outputs must be equal when either providing logical high state or low state. With Vcc = 5V 74HC540 can be choosen, but when running at Vcc = 3V 74VHC540 is a better choice.

3. The source impedance of driving outputs must be very low, at least much lower than the tolerance of R2R resistors. 74HC540 shows about 50 Ohm source impedance, which is adequately low for most purposes. For Vcc = 3V 74VHC540 should be choosen, because 74HC540 gets to high ohmic.

4. The R2R ladder presents a rather high source impedance to the following ADC. In our case 11kOhm, independently of logical state of driving outputs. Certain ADCs do not like such high source impedances and quit them with offset errors, resulting from non-tolerable input bias currents. Others get their track and hold stage not adequately charged due to too high time constant formed by source impedance of R2R ladder and input track capacitance. In such cases inserting of a buffer is needed.

Kai