| ??? 04/22/05 23:56 Read: times |
#92211 - Mot Type I'face, /DTA delay help - 89C52 |
Hi,
I am trying to interface a 89C52 with the MT89L86 from Zarlink. This chip has a buss delay line which needs to halt the CPU to hold the buss read/write until the MT89L86 is completed. I am using a Atmel 89C52 device. The data sheet can be found by doing a search on the www.zarlink.com site. It does not appear in the product list. I would like to know if I can gate (OR or AND) the clock going to the CPU from an oscillator, to hold the buss at the right levels until the MT89L86 chip releases the clock for the CPU to continue. The /DTA line would control the clocking of the CPU. Any ideas on this would help. I am using the Intel multiplex interface design. Thanks. |
| Topic | Author | Date |
| Mot Type I'face, /DTA delay help - 89C52 | 01/01/70 00:00 | |
| Just use the ports | 01/01/70 00:00 | |
| Not enough IO ports! Must Multiplex | 01/01/70 00:00 | |
| I agree - Just Bit Bang it. | 01/01/70 00:00 | |
| Eh?! | 01/01/70 00:00 | |
| You can do both | 01/01/70 00:00 | |
Thanks, will 'bit bash' | 01/01/70 00:00 |