??? 06/14/05 22:26 Read: times |
#94971 - an obvious guess Responding to: ???'s previous message |
First, let me say that I appreciate the help.
But, I am able to see the master's output 'override' the slave's output *as it is happening* with a logic analyzer; there is a fraction-of-a-microsecond delay between whatever the master is outputting (say, 0x55) and that exact signal showing up on the slave's output, despite the fact that I am trying to send something totally different (say, 0x33) out the slave's output. This problem persists even when I randomly change what either the master or the slave is outputting. Also, when I lift the slave's MISO pin off my target board, it *still* directly follows the master's output, indicating that the problem is happening internally in the slave. Swapping the slave out with a new part did not help. Strange, huh? |
Topic | Author | Date |
8052-to-8052 SPI Communication | 01/01/70 00:00 | |
glad that you do | 01/01/70 00:00 | |
8052-to-8052 SPI Communication | 01/01/70 00:00 | |
an obvious guess | 01/01/70 00:00 | |
an obvious guess | 01/01/70 00:00 | |
a question | 01/01/70 00:00 | |
a question | 01/01/70 00:00 | |
as the first byte from the slave | 01/01/70 00:00 | |
more questions | 01/01/70 00:00 | |
re:SPI![]() | 01/01/70 00:00 |