| ??? 06/15/05 14:33 Modified: 06/15/05 14:36 Read: times |
#95015 - more questions Responding to: ???'s previous message |
hi,
1. How are /SS pins connected at both master and slave? 2. How do you manage SPI interrupts? The problem I may figure out is that for AT89S8252 both UART and SPI interrupts share the same interrupt vector. When you enable UART interrupt (ES=1) then you enable SPI interrupt as well (if bit SPIE=1). As result, if UART interrupt is enabled (for example, for debug purposes) then each time slave sent a byte, interrupt at 0x0023 (Serial Port) is executed. So you must check the source of the interrupt by check flags TI/RI to determine the source of the interrupt. Otherwise you may obtain very strange results. Edited here: Oh, I have looked at your code and see that you have disabled the SPI interrupt by SPIE bit of SPCR. Sorry, the question is gone. Regards, Oleg |
| Topic | Author | Date |
| 8052-to-8052 SPI Communication | 01/01/70 00:00 | |
| glad that you do | 01/01/70 00:00 | |
| 8052-to-8052 SPI Communication | 01/01/70 00:00 | |
| an obvious guess | 01/01/70 00:00 | |
| an obvious guess | 01/01/70 00:00 | |
| a question | 01/01/70 00:00 | |
| a question | 01/01/70 00:00 | |
| as the first byte from the slave | 01/01/70 00:00 | |
| more questions | 01/01/70 00:00 | |
re:SPI | 01/01/70 00:00 |