| ??? 06/16/05 06:25 Read: times |
#95066 - Memory Map IT !! Responding to: ???'s previous message |
Vijayganesh S said:
I am using EEPROM as external memory to the microcontroller(89S8252) and also I need to 8255 PPI for sending my data simultaneously.
In my software routine, Whenever I am accessing EEPROM i disabled thE 8255 through P1.5 pin(Port 1) which is connected to the CS (chip select) pin of 8255. Similarly when accessing 8255 registers i disabled EEPROM through P1.4 pin which is connected to the CS pin of EEPROM. the address for 8255 port selection: I used CLR P1.5 ;ENABLES 8255 SET P1.4 ;DISABLES EEPROM MOVX @R0,A instruction for accessing 8255 ports control reg: 03 port A : 00 port B : 01 port C : 02 i used CLR P1.4 ;ENABLES EEPROM SET P1.5 ;DISABLES 8255 MOVX A,@DPTR When accessing the data from EEPROM I know 8255 is having the output latched feature, so it should retain the present output when it is disabled. But my problem is at some instant it retains the output when it is disabled and at some instant its not doing so. can anybody tell me what is the mistake i did here You may not have these problems if you memory map the 8255 to say $FFF0. This means sacrificing your top 16 address locations of the 64K. Your code will also be simpler. Check if your controller has a 'stretch' feature for the RD* and WR* to accommodate slower peripherals. Many 51 derivitives have this. Good luck, Tony G. |
| Topic | Author | Date |
| external memory access problem | 01/01/70 00:00 | |
| my first suggestion.... | 01/01/70 00:00 | |
| actually i tried in single instruction | 01/01/70 00:00 | |
| more | 01/01/70 00:00 | |
| Relic Chips Are Slow | 01/01/70 00:00 | |
| Memory Map IT !! | 01/01/70 00:00 | |
| and then you may get others | 01/01/70 00:00 | |
| Such AS ?? | 01/01/70 00:00 | |
| with the '51 | 01/01/70 00:00 | |
| 8085/805x <=>8255 | 01/01/70 00:00 | |
| to slow, too low | 01/01/70 00:00 | |
really need more info to be helpful | 01/01/70 00:00 | |
| Query | 01/01/70 00:00 | |
| re query | 01/01/70 00:00 |