Hi,

I'm using LPC925 and LPC935 as an I2C slave in a 100kHz enviroment. I'm using the I2C hardware inside the LPCs. I'm looking for some information about the timing regarding the IRQ in relation to the I2C stream. Is the IRQ asserted at the beginn or at the end of the ACK byte. When is the next I2DAT overwritten/needed?

As the I2DAT has no buffer there is pretty less time to save or load I2DAT after an IRQ. As a slave receiver I asume I have about 10 us before I2DATA is overwritten. But what as a slave transmitter? 5us?

As a slave timming is more critical than as a master, because I have no influence on the clock. I2C supports this for slaves, by clamping SCL down. But I don't know wheter LPC HW supports this.

Any information would be appreciated.

TIA

Gustl