I have been having a problem with an 80C52 @ 12.288MHz crystal using a 29F010 FLASH chip with a bus that has a lot of capacitance, around 140pF.

I am seeing FLASH data bit flips. The problem looks to be related to the 80C52 taking longer than the 10ns Tplaz spec to release the address before the FLASH outputs data. I have seemed to solve the problem by delaying the _PSEN to _OE line on the flash by 20-30ns. This eliminates bus contention between the remnants of the address and the FLASH output. The FLASH data isn't valid for another 70ns or so, but it doesn't seem to be able to recover from the flipped bits during the contention.

Adding the delay is a bit of a problem because it impacts the next address cycle, covered by the Tpxiz spec of 59ns for the Intel part. Philips says that their parts allow some contention, but Im worried that the added bus capacitance will cause some more serious contention.

RAM and EPROM parts don't seem to exhibit the same behavior.

Am I asking the micro to drive too much bus capacitance?

Thanks

Patrick