hi,

I would suggest Little Joe to replace next code:

   movx  @dptr,a                  ;store byte to destination
   movx  a,@dptr                  ;readback byte from RAM

with this:

   movx  @dptr,a                  ;store byte to destination
   clr   a
   movc  a,@a+dptr                ;readback byte from RAM

This comes from the fact that data memory access (via MOVX) and program memory fetch have different timings.

MOVX to external memory uses /RD pin and
its "/RD low to valid data in" t_RLDV is
5*t_CLCL-90 (so we have 5*1000/24-90 ~= 118ns)

External program fetch uses /PSEN pin and
its "/PSEN low to valid instruction in" t_PLIV is
3*t_CLCL-45 (so we have 3*1000/24-45 = 80ns)

If we remember about two LS gates for /PSEN and /RD so we must add its propagation delay as well. For typical LS gate this time is about 9..15ns. We should use worst conditions so for two gates this time is 15+15=30ns. Now we have:
MOVX requires 118-30=88ns RAM
fetch requires 80-30=50ns RAM

Now the question for Jan: do we assume that RAM select time via /CS is fast enough in your puzzle? If not then in original program:
test with MOVX is passed but external fetches fail and provide corrupt data. As result MCU executes rubbish and there are may be instructions which clear P1 so both LEDs are lighted.
To avoid this behaviour test routine should be modifyed as I have already shown (with read-back via MOVC).

Regards,
Oleg