| ??? 08/02/07 10:02 Read: times |
#142637 - possible, rather than necessary Responding to: ???'s previous message |
Christoph Franck said:
In a non-Load/Store architecture, on the other hand, data processing instructions may work directly with the contents of the memory, which makes a wide variety of adressing modes necessary. Possible, not necessary. There is nothing which prevents you to strip the CISC instructions down to the same load/store instruction set - just that it makes no sense... --- There are more paradigms commonly used in RISC than just load/store. The ultimate goal is overall simplicity, which supposedly allows higher clocks, and this would (over)compensate the decreased "work-per-instruction". The recent development mostly disproved this approach; and RISCs are today generally no significantly better than CISCs, except a few niche applications. JW |
| Topic | Author | Date |
| Instruction Set in RISC Microcontroller | 01/01/70 00:00 | |
| the name is misleading... | 01/01/70 00:00 | |
| RISC actually means ... | 01/01/70 00:00 | |
| possible, rather than necessary | 01/01/70 00:00 | |
| Reduced complexity | 01/01/70 00:00 | |
| if you want to see a real RISC ... | 01/01/70 00:00 | |
| RISCness | 01/01/70 00:00 | |
| I wouldn't call this Signetics thing a RISC... | 01/01/70 00:00 | |
| The original RISC | 01/01/70 00:00 | |
| Only 8 Codes! | 01/01/70 00:00 | |
If I were you, I'd consult one of the PDP8 sites | 01/01/70 00:00 | |
| I think it meets the spec ... | 01/01/70 00:00 | |
| about that website bug ... | 01/01/70 00:00 |



