| ??? 10/21/05 11:01 Read: times |
#102715 - errata... Responding to: ???'s previous message |
"AT89S8253 Rev. J Errata Sheet" said:
1. Watchdog Timer Settings
The watchdog timer is always stuck in the shortest setting (PS2=PS1=PS0=0, 16K cycles). Workaround: None. The user is restricted to the above limitation. Rev K removes this problem. It's not in the Rev. K Errata Sheet, so they already fixed it on the newer silicon. However, I don't know how do you distinguish the silicon revisions... Jan Waclawek |
| Topic | Author | Date |
| AT89S8253 WDT processor bug ? | 01/01/70 00:00 | |
| errata... | 01/01/70 00:00 | |
More AT89S8253 Errata | 01/01/70 00:00 | |
| The wdg SFR has a different address | 01/01/70 00:00 | |
| No, Jan is right ... | 01/01/70 00:00 | |
| Don't use "green" micros! | 01/01/70 00:00 | |
| Testing | 01/01/70 00:00 | |
| Good luck!! | 01/01/70 00:00 | |
| useless watchdog | 01/01/70 00:00 | |
| You can have it in IDLE mode | 01/01/70 00:00 |