??? 11/08/05 19:26 Read: times |
#103437 - Timing of A/D conversion on 80c552 |
I have this problem in my application. I know the conversion is supposed to take 50 cycles, and my looping administrative code takes about 70. I start the conversion by writing 0x08 to ADCON. When the conversion is through, interrupt 10's ISR turns off the ADCI bit, and sets a global variable to true.
All that works fine. The thing that mystifies me is that the total loop time is 120 cycles, i.e. the 50 for the conversion plus the 70 for the admin stuff. What I mean by admin stuff is writing the result and a timestamp to XDATA for later examination. I would have though that that admin stuff cold be done in parallel with the conversion process, and actually finishing twenty cycles after the conversion is through. Shouldn't the conversion start, the program continue with the admin stuff, and the loop take 70 cycles? It's as if the 80c552 blocks until the conversion is through. I have read EIE/AN93017 and their interrupt driven example has a comment that indicates that the rest of the program is executing other instructions while the conversion is taking place. They have a while loop hat constantly examines a completion flag, waiting for the conversion to finish. I am not experiencing the same behavior, though. Any help is appreciated. |
Topic | Author | Date |
Timing of A/D conversion on 80c552 | 01/01/70 00:00 | |
show your code | 01/01/70 00:00 | |
sorry, here is the loop and the ISR | 01/01/70 00:00 | |
I see no such thing, please cut and past | 01/01/70 00:00 | |
you're right. I took out the setting of | 01/01/70 00:00 | |
PLEASE cut and paste, as is it will not | 01/01/70 00:00 | |
OK, nevermind. The whole code is way too | 01/01/70 00:00 | |
often the reason for an unexplainable pr | 01/01/70 00:00 | |
Funny you mention that![]() | 01/01/70 00:00 | |
inconsistent | 01/01/70 00:00 | |
since wwe all know that you get what you | 01/01/70 00:00 | |
True. I fully expect to have to study | 01/01/70 00:00 |