Hi,
in my application I use Timer 0 to generate a gate time for counting pulses on port pins. T0 interrupt is active. There are some commands in the main program that must not be disturbed by the interrupt. So I clear ET0 before those commands and set it again after this part of code is done. Now imagine T0 int. is not active, but overflow occurs, TF0 is set. Then T0 int. is activated (setb ET0), will this lead to the ISR (immediately)? Or is this overflow lost/forgotten? I don't think so, but want to be sure...
Thanks for your help!

Carsten