| ??? 08/09/06 12:12 Read: times |
#121902 - try this Responding to: ???'s previous message |
instead of
setb ignal clr signal do this setb signal nop nop nop clr signal of course, if a signal is true low, the sequence would be clr signal nop nop nop setb signal Often the faster (you are uing a 6 clocker) processors make 'old code' fall apart due to I/O pules being too narrow for the device. Erik |
| Topic | Author | Date |
| To Micheal and dear alll regarding sed 1335 | 01/01/70 00:00 | |
| Have you checked the timing? | 01/01/70 00:00 | |
| My Modifications | 01/01/70 00:00 | |
| Your code doesn't show the modifications | 01/01/70 00:00 | |
| the hardware has been verified | 01/01/70 00:00 | |
| timings and delaying as well | 01/01/70 00:00 | |
| try this | 01/01/70 00:00 | |
Tried ... Delays Doesnt Help .... | 01/01/70 00:00 |