| ??? 09/03/01 10:58 Read: times |
#14701 - RE: Single Step Run |
The Triscend E5 has an on-chip debug facility, accessed via the JTAG port.
AFAIK, when this causes a break (sfotware or hardware) it really does stop the core dead (interrupts, timers, et al) |
| Topic | Author | Date |
| Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run - Gerry | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
| RE: Single Step Run | 01/01/70 00:00 | |
RE: Single Step Run - George | 01/01/70 00:00 |



