??? 12/14/07 14:16 Read: times |
#148213 - more clarification needed Responding to: ???'s previous message |
Mehdi said:
1-In "Power Off" state, in the receiving state and at logic "1" in the transmitting state, TX_RX of the device shall behave like a resistance to ground of 120 kohms ± 5 %. U3A does not answer to this. You need open drain transistor with reistor 120k between drain and ground. About receiving - You wrote one wire communication,with 0-12 volt voltage level. 2-At logic "0", in the transmitting state, the device shall have an equivalent sink resistance of not more than 110 ohm between TX_RX and ground. So what is true - Your side must transmit only by pulling low data line and other side can transmit with high and low levels? It will be simple to help if You specify what device will be connected. CPLD/FPGA maybe is not needed . regards |