| ??? 09/29/01 19:18 Read: times |
#15277 - RE: internal ram and port0 |
not according to datasheet of philips, pg30. In fact even in the vanilla 8751,i used movx@ri for external peripherals(upto 256 addresses), and had p2 free as a general port, for this look up the original intel typical examples, only the movx @dptr and external code access affects p2 in the old chip. |
| Topic | Author | Date |
| internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
RE: internal ram and port0 | 01/01/70 00:00 |



