| ??? 10/10/01 15:03 Read: times |
#15600 - RE: internal ram and port0 |
MOVX @Ri is defined as a 16-bit address derived from MSB on P2 and LSB in Ri. There is NO WAY that a chip with more than 256 bytes of ERAM can be used to address ERAM without affecting P2. If such a chip was used with no concern for loading P2 before ERAM access the memory slot would be random.
Of course, MOVX @DPTR will not affect any port. The problem of using MOVX @Ri must sometimes be "fought" with an optimizing C compiler. Do not get caught in this trap. Erik |
| Topic | Author | Date |
| internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
| RE: internal ram and port0 | 01/01/70 00:00 | |
RE: internal ram and port0 | 01/01/70 00:00 |



