Dear Girish,

Please verify following things,

1.> hardware pin of writeprotect on EEPROM is at proper logic level.

2.> lines that both MCUs are using for SCL & SDA are held at logic 1 when MCU is not using I2C bus.

3.> Is EEPROM responding with proper ACK.

4.> I2C action from both MC are in different time slots.(it should not clash).

5.> Just for debugging purpose try to read data from master 1 only (let master 2 be idle with SCL & SDA initialised at logic 1).
(this exercise will tell u whether or not the I2C routines are working OK)

Mahesh