Have you considered that often times when you use simple bipolar transistors as common emitter saturated switching level translators that the signal delay through a single stage can be 100 to 300 nanoseconds? Depending upon how you go about bit banging the SPI interface to the target device bits that you think you are changing at the same time on the MCU are not in fact going to change at the same time at the target. As a matter of fact the delay I mention generally shows up in the condition of the saturated switch going OFF and so only affects the "logic signal" in one direction. This delay difference could be eating up your setup or hold timing at the target device!! This of course is dependent on the types of components you are using, sizes of the resistors and method used to bitbang the signals.

Michael Karas